1. Field of Invention
Apparatuses and methods consistent with the present disclosure of invention relate to a liquid crystal display (LCD) and a control method thereof, and more particularly to a liquid crystal display having a demultiplexer to control the output of a data signal and a control method therefor.
2. Description of Related Technology
In general, a liquid crystal display (LCD) generates an electric field in a liquid crystal layer disposed between two display substrates. The LCD adjusts the intensity of an electric field in each of plural pixel areas to regulate the transmittance of light passing through the liquid crystal layer of those pixel areas, thereby displaying a desired image.
The typical LCD includes a display panel where a plurality of pixel units and corresponding signal lines are provided, the latter being used to transmit signals to the pixel units. The typical LCD further includes a gate driver to output respective gate signals to gate ones of the signal lines, a data driver to output respective data signals to data ones of the signal lines, and a controller to control the drivers. When each of the pixel units is supplied with a respective data signal while being simultaneously supplied with an activating gate signal (VgON), a pixel-electrode of the pixel unit is charged with a voltage corresponding to the data signal and a desired electric field is then formed between the pixel-electrode and an opposed common electrode.
In one class of embodiments, each of plural main pixel units is subdivided into a plurality of sub-pixels where the latter may be respectively driven by different data signal levels. In such a case, the data driver may include a plurality of data driving chips. Each of the data driving chips and a corresponding plurality of sub-pixels in one main-pixel area are connected through a shared data line (a time multiplexed line) to each other. In other words, in order to decrease the number of data driving chips used per sub-pixel, in one embodiment, each output terminal of each of the data driving chips is connected via a shared data line (that operates on the basis of time multiplexing) with a plurality of individual data lines (also referred to herein as subsidiary or source data lines or SDL's). The LCD further includes a demultiplexer with a 1:n demultiplexer system so that different data signal levels can be sequentially output to a plurality of individual data lines (SDL's) connected via the 1:n demultiplexer to a time shared one output terminal of one data driving chip.
Meanwhile, for the one main-pixel unit, i.e., a plurality of sub-pixels (e.g., R, G, B) are turned on by one activating gate signal at the same time. However, as a time-varying data signal levels are sequentially applied to the sub-pixels, the last sub-pixel in the sequence may not be sufficiently charged due to one or more RC time constant limitations that are imposed on transferring charge from a shared data line to an individual data line (an SDL and its associated parasitic capacitance) and then through the sub-pixel's TFT to the pixel-electrode capacitance of that sub-pixel. In other words, a plurality of data signal levels are sequentially applied one after the other during a time period corresponding to one gate-on time. However, because the last sub-pixel in the sequence is being charged as the gate line and shared data line are being deactivated, the last sub-pixel (and its associated RC effective circuitry) does not have as long of a time to receive charge from the corresponding shared data line as do the previously driven sub-pixels. As a result, insufficient charging (or discharging) of the last pixel-electrode may occur.